1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory having nonvolatile memory cells and word lines connected to the memory cells.
2. Description of the Related Art
Due to the miniaturization of semiconductor device structures, the insulator film of transistors has been thinning. To prevent reduction of the reliability of transistors, the power supply voltage supplied to a nonvolatile semiconductor memory such as a flash memory has been decreasing. Where an internal voltage (e.g., a high-level voltage of the word lines) used for accessing memory cells is higher than a power supply voltage, it is necessary to form, in the nonvolatile semiconductor memory, a boost circuit for generating an internal voltage by boosting the power supply voltage (e.g., Japanese Unexamined Patent Application Publication No. 2000-149577).
In general, a boost circuit generates a boosted voltage utilizing a switching operation of a transistor and coupling action of a capacitor. As a result, the boosted voltage varies depending on variations in a manufacturing process of a nonvolatile semiconductor memory. More specifically, the boosted voltage varies depending on the threshold voltage of the transistor, the thickness of an insulator film of the capacitor, and other factors. In particular, where the boost circuit operates only in accessing memory cells and a boosted voltage is generated by supplying a pulse signal to one end of the capacitor, it is difficult to finely adjust the boosted voltage through monitoring it. In this case, the boosted voltage is directly affected by variations in a manufacturing process.
For example, where the boosted voltage is used as a high-level voltage of the word lines, a variation in the voltage of the word lines narrows operation margins such as a read margin. This may lower the yield of the semiconductor memory to a large extent. Conventionally, to prevent variation of the voltage of the word lines, a technique is employed that the number of capacitors used for generating a boosted voltage is changed by switching photomasks for a wiring layer.
However, in this case, it is necessary to prepare plural kinds of photomasks. Further, patterns formed in a photomask are transferred to all chips on a wafer. This means a problem that the boosted voltage cannot be adjusted chip by chip. As a result, it is impossible to, generate an optimum boosted voltage for each chip. In other words, the effect of increasing the operation margins is not sufficient.